The present embodiments relate to integrated circuits and, more particularly, to regulating the supply voltage of an integrated circuit.
In recent years, there has been an increasing demand for integrated circuits to operate at higher speeds while minimizing power consumption. Power consumption depends heavily on the supply voltage of the integrated circuit. An increase in supply voltage generally leads to an increase in performance, but also to higher power consumption. A decrease in supply voltage generally leads to lower power consumption, but also to a decrease in performance. To achieve the desired balance between power consumption and performance across a wide variety of applications and operation conditions, integrated circuits are sometimes provided with dynamic voltage-frequency scaling (DVFS) capabilities.
In a conventional dynamic voltage-frequency scaling scheme, an integrated circuit is able to operate at different voltage-frequency points. When higher performance is needed, the voltage can be increased to reduce gate delays and to allow for an increase in clocking frequency and thus higher performance. When low power consumption is desired, the clocking frequency is decreased to allow for a reduction in voltage and thus lower power consumption. The integrated circuit is usually placed in these different voltage-frequency states depending on changes in current incoming workload or operating conditions.
The relationship between the voltage and frequency is, however, fixed at design time and depends mostly on the selected process corners at fabrication and on the selected circuit structure, neither of which can be adjusted after fabrication.